Electro-Static Discharge (ESD) is a problem for integrated circuits. Accordingly, integrated circuits are protected against ESD events by special devices. A desired ESD device structure must be able to turn on when the Vcc is exceeded. Once the ESD device is activated, the ESD event discharges through the ESD device rather than the integrated circuit. If the ESD device does not turn on at or does not turn on quickly enough, an ESD event can damage the integrated circuit. Additional requirements for the ESD device are low leakage current and low input capacitance during normal operation.
The simplest ESD protection device is a p-n junction Zener diode 100, such as illustrated in FIG. 1(a)(1-2). This p-n Zener diode 100, shown in FIG. 1(a)(1), can be manufactured as shown in FIG. 1(a)2 by implanting an N-doped area 112 into a P+ doped substrate 114. This zener diode 100 when reverse biased operates in the avalanche breakdown regime and conducts current. To achieve 5 volts or less breakdown, requires heavily doped N and P regions. A N+/P+ doped zener diode is extremely leaky because of electron tunneling current across the P+/N+ junction. Another drawback of this N+/P+ zener diode is the increase in junction capacitance.
Another known ESD device is a vertical N+/P/N+ structure 120 shown in FIG. 1(b), and operates as a punch-thru device, having N+ region 122, P region 124, and N+ region 126. Initial Punch-thru voltage is determined by the doping and width of the P-region 124. It is difficult to maintain tight control for low punch-thru Voltage and Clamp Voltage because this structure 120 requires tight control of the P region widths.
Another ESD device is a vertical N+/P+/P−/N+ structure 130 as shown in FIG. 1(c), which has an N+ region 132, a P+ region 134, a P− region 136 and an N+ region 138, where the P+ region 134 encompasses the N+ region 132. Drawbacks for this device include the high reverse breakdown voltage because of the lightly doped P− region.
It is difficult to develop an ESD structure that protects integrated circuits that operate at low Vcc (<5 Volts), has low leakage (<100 nAmp), has low capacitance and has low reverse breakdown voltage.